I am a Registered Patent Agent ready to utilize twenty plus years experience in Semiconductor Engineering & Product Development to write and prosecute patents before the USPTO.

I currently have five patents issued and 6 pending for advancements in the fields of semiconductors, biometrics, personal identification, and paddle sports. Skills of special note include a working knowledge of semiconductor processes & circuit interactions, test methodologies, technical report & specification writing, semiconductor standards bodies, biometric concepts, products, and applications.

SAFEASSURED LLC & WFS - Wausau, WI
Vice President Product & Development.  Development of Biometric solutions for the banking and financial industry. Invention and all aspects of development and production of the SafeAssured Child Identification solution including patent generation prosecution. Worked losely with Marketing on product positioning including liason lobbying in Washington DC.

ST MICROELECTRONICS -. Carrollton, TX
TouchChip Engineering.  Increased wafer yield from 25% to 80% and final test from 40% to 95%. Demonstrated new and useful properties of sensor for chemical sensing. Developed patentable processes and methodologies to increase robustness of the sensor to allow broader application. Worked to develop new applications and markets for the technology. Performed competitor analysis. Followed Biometrics standards and bodies. Developed relationships with customer base.
Semi-Custom Products Division Engineering Manager.  Managed 16 Product, Test, and Assembly Engineers for ASIC Products. Budget, set direction, personnel management. Fab assembly interface in Europe and Asia. Dealt with complex customer issues and relationships in quality and delivery of a demanding state of the art semiconductor product.

PHILIPS SEMICONDUCTOR - NM, CA, and UT. (formerly Signetics)
PLD Product Eng. Team Leader.  Managed a team of 6 engineers transferring products across three Fabs. Involved in Project Management, Design for Test, product qualification, Quality and Reliability Issues.
PLD Project Team Leader.   Competitive analysis with resulting project proposal saving $6 M over 3 years. Lead a team of Design and Process Engineers working with process development. Met timeline and budget. Yield exceeded profit goals.
Failure Analysis Mgr/Eng.  Failure Analysis of customer returns and reliability failures. Managed 6 engineers with 500 projects/year workload. Improvements in cycle time. Responsible for Customer interface including Japan and Europe. Yield and reliability improvement on complex semiconductor processes.
Senior Process Engineer.  Coordinating sustaining and projects across all shifts. Process optimizations with an estimated savings of $1 Million/yr.

GENERAL INSTRUMENT -. Chandler, AZ (now Microchip Technologies)
Device Engineer.  Responsible for EEPROM and EPROM product development and yield improvement. Worked with design, production control, process engineering, and upper management to transfer a manufacturing line between New York and Phoenix Fabs.

SIGNETICS CORP. - Orem, UT.
Process Engineer.  Sustained all area in Process Engineering for circuit manufacturing

UNIVERSITY OF PHOENIX. - Phoenix, AZ;  Salt Lake City, UT.
Master of Business Administration. 1987

BRIGHAM YOUNG UNIVERSITY. - Provo, UT.
Bachelor of Science Chemical Engineering. 1982

COEUR d' ALENE SENIOR HIGH. - Coeur d' Alene, ID. 1974

Completed Entrepreneurship course at University of Wisconsin SBDC.
Member of the IEEE.
Member of the Biometric Consortium.
ST University Advanced Management Procedures Training.
Philips’ JEDEC representative for setting industry standards in Programmable Logic.
Statistical Methods Improving Productivity - ME561 at the University of New Mexico.
Circuit Fundamentals
Device Physics for Integrated Circuits - ECEn542R at BYU
Toastmasters
Project Management Training